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Data Representation
DATA REPRESENTATION
Data Types
Complements
Fixed Point Representations
Floating Point Representations
Other Binary Codes
Error Detection Codes
Computer Organization
Computer Architectures Lab
Data Representation
Data Types
DATA REPRESENTATION
Information that a Computer is dealing with
* Data
- Numeric Data
Numbers( Integer, real)
- Non-numeric Data
Letters, Symbols

* Relationship between data elements
- Data Structures
Linear Lists, Trees, Rings, etc

* Program(Instruction)

Computer Organization
Computer Architectures Lab
Data Representation
Data Types
NUMERIC DATA REPRESENTATION
Data
Numeric data - numbers(integer, real)
Non-numeric data - symbols, letters

Number System
Nonpositional number system
- Roman number system
Positional number system
- Each digit position has a value called a
weight associated with it
- Decimal, Octal, Hexadecimal, Binary

Base (or radix) R number
- Uses R distinct symbols for each digit
- Example A = a

. a a .a …a
Σ a Rk
Radix point(.) separates the integer
portion and the fractional portion

R = 10 Decimal number system
R = 2 Binary
R = 8 Octal
R = 16 Hexadecimal

Computer Organization
Computer Architectures Lab
Data Representation
Data Types
WHY POSITIONAL NUMBER SYSTEM IN
THE DIGITAL COMPUTERS ?
Major Consideration is the COST and TIME
- Cost of building hardware
Arithmetic and Logic Unit, CPU,Communications

- Time to processing
Arithmetic - Addition of Numbers - Table for Addition
* Non-positional Number System
- Table for addition is infinite
--> Impossible to build, very expensive even
if it can be built

* Positional Number System
- Table for Addition is finite
--> Physically realizable, but cost wise
the smaller the table size, the less
expensive --> Binary is favorable to
Decimal

0 1 2 3 4 5 6 7 8 9
0 0 1 2 3 4 5 6 7 8 9
1 1 2 3 4 5 6 7 8 9 10

2 2 3 4 5 6 7 8 9 1011
3 3 4 5 6 7 8 9 101112

4 4 5 6 7 8 9 10111213
5 5 6 7 8 9 1011121314

6 6 7 8 9 101112131415
7 7 8 9 10111213141516

Binary Addition Table
8 8 9 1011121314151617
9 9 101112131415161718

Decimal Addition Table
Computer Organization
Computer Architectures Lab
Data Representation
Data Types
REPRESENTATION OF NUMBERS
POSITIONAL NUMBERS
Decimal Binary Octal Hexadecimal
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
Binary, octal, and hexadecimal conversion
1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1
Computer Organization
Computer Architectures Lab
Data Representation
Data Types
CONVERSION OF BASES
Base R to Decimal Conversion
… a . a … a
V(A) = Σ a Rk
(736.4) = 7 x 8 + 3 x 8
= 7 x 64 + 3 x 8 + 6 x 1 + 4/8 = (478.5) 10
(110110) =
. = (54) 10
(110.111) =
. = (6.785) 10
(F3) = . = (243)
(0.325) = . = (0.578703703 .)
Decimal to Base R number
- Separate the number into its integer and fraction
parts and convert each part separately.
- Convert integer part into the base R number
--> successive divisions by R and accumulation
of the remainders.
- Convert fraction part into the base R number
--> successive multiplications by R and
accumulation of integer digits
Computer Organization
Computer Architectures Lab
Data Representation
Data Types
Convert 41.6875 to base 2.
Integer = 41
Fraction = 0.6875
1.5000
x 2
1.0000

(41) = (101001) (0.6875) = (0.1011)
(41.6875) = (101001.1011)
Exercise
Convert (63) to
base 5: (223) 5
Convert (1863) to base 8: (3507)
Convert (0.63671875) to hexadecimal: (0.A3)
Computer Organization
Computer Architectures Lab
Data Representation
Complements
COMPLEMENT OF NUMBERS
Complements
- to convert positive to negative or vice versa

Two types of complements for base R number system:
- R’s complement
- (R-1)’s complement

The (R-1)’s Complement
Subtract each digit of a number from (R-1)
- 9’s complement of 835 is 164
- 1’s complement of 1010 is 0101 (bit by bit
complement operation)
The R’s Complement
Add 1 to the low-order digit of its (R-1)’s
complement
- 10’s complement of 835 is 164 + 1 = 165
- 2’s complement of 1010 is 0101 + 1 = 0110
Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
FIXED POINT NUMBERS
Numbers
Fixed Point Numbers and Floating Point Numbers

Binary Fixed-Point Representation
X = x x

. x x . x x . x
Sign Bit(x )
- 0 for positive
- 1 for negative
Remaining Bits(x

. x x . x x . x )
- Following 3 representations
Signed magnitude representation
Signed 1’s complement representation
Signed 2’s complement representation

Example: Represent +9 and -9 in 7 bit-binary number
Only one way to represent +9 ==> 0 001001
Three different ways to represent -9:
In signed-magnitude: 1 001001
In signed-1’s complement: 1 110110
In signed-2’s complement: 1 110111

In general, in computers, fixed point numbers are
represented either integer part only or fractional part
only.

Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
CHARACTERISTICS OF 3
DIFFERENT REPRESENTATIONS
Complement
Signed magnitude
--> Complement only the sign bit
Signed 1’s complement
--> Complement all the bits including sign bit

Signed 2’s complement
-->Take the 2’s complement of the number,
including its sign bit.

Maximum and Minimum Representable Numbers and
Representation of Zero

Signed Magnitude
Max: 2n - 2-m 011 . 11.11 . 1
Min: -(2n - 2-m) 111 . 11.11 . 1
Zero: +0 000 . 00.00 . 0
-0 100 . 00.00 . 0

Signed 1’s Complement
Max: 2n - 2-m 011 . 11.11 . 1
Min: -(2n - 2-m) 100 . 00.00 . 0
Zero: +0 000 . 00.00 . 0
-0 111 . 11.11 . 1

Signed 2’s Complement
Max: 2n - 2-m 011 . 11.11 . 1
Min: -2n 100 . 00.00 . 0
Zero: 0 000 . 00.00 . 0

Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
ARITHMETIC ADDITION
SIGNED MAGNITUDE
[1] Compare their signs
[2] If two signs are the same , ADD the two
magnitudes - Look out for an overflow
[3] If not the same , compare the relative
magnitudes of the numbers and then
SUBTRACT the smaller from the larger
--> need a subtractor to add
[4] Determine the sign of the result

15 1111 -> 01111
3 0011 -> 00011
6 + (- 9) -6 + (-9)
- 3 0011 -> 10011
-15 1111 -> 11111
Overflow
9 + 9 or (-9) + (-9)
9 1001
(1)0010

overflow
Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
ARITHMETIC ADDITION
SIGNED 2’s COMPLEMENT
Add the two numbers, including their sign bit, and
discard any carry out of left-most(sign) bit
+) 9 0 1001
+) 9 0 1001
+) -9 1 0111
+) -9 1 0111
-18 (1)0 1110
n-1 n-1 n-1
overflow
2 operands have the same sign
+) 9 0 1001
and the result sign changes
n-1 n-1 n-1
n-1 n-1 n-1
n-1 n-1 n-1
Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
ARITHMETIC ADDITION
SIGNED 1’s COMPLEMENT
Add the two numbers, including their sign bits.
- If there is a carry out of the most significant

) bi the resu
lt is incremented by 1 and
the carry is discarded.
end-around carry
+) -9 1 0110
+) 9 0 1001
(1) 0(1)0010
not overflow
+) 9 0 1001
(1)0 1100
1 (1)0010
overflow
Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
COMPARISON OF REPRESENTATIONS
* Easiness of negative conversion
S + M > 1’s Complement > 2’s Complement
* Hardware
- S+M: Needs an adder and a subtractor for
Addition
- 1’s and 2’s Complement: Need only an adder

* Speed of Arithmetic
2’s Complement > 1’s Complement(end-around C)
* Recognition of Zero
2’s Complement is fast
Computer Organization
Computer Architectures Lab
Data Representation
Fixed Point Representations
ARITHMETIC SUBTRACTION
Subtraction
Add complement of the subtrahend to the
minuend including the sign bits.

Take the complement of the subtrahend
( ± A ) - ( - B ) = ( ± A ) + B
( ± A ) - B = ( ± A ) + ( - B )
Computer Organization
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Data Representation
Floating Point Representation
FLOATING POINT NUMBER
REPRESENTATION
* The location of the fractional point is not fixed to
a certain location
* The range of the representable numbers is wide
--> high precision

sign exponent mantissa
- Mantissa
Signed fixed point number, either an integer
or a fractional number

- Exponent
Designates the position of the radix point

Decimal Value
V(F) = V(M) * RV(E)
M: Mantissa
E: Exponent
R: Radix

Computer Organization
Computer Architectures Lab
Data Representation
Floating Point Representation
FLOATING POINT NUMBERS
.1234567
mantissa
exponent
==> +.1234567 x 10
Note:
In Floating Point Number representation,
only Mantissa(M) and Exponent(E) are explicitly
represented. The Radix(R) and the position of
the Radix Point are implied.

Example
A binary number +1001.11 in 16-bit floating point
number representation(6-bit exponent and 10-bit
fractional mantissa)

0 0 00100 100111000
Exponent
Mantissa
0 0 00101 010011100
Computer Organization
Computer Architectures Lab
Data Representation
Floating Point Representation
CHARACTERISTICS OF FLOATING
POINT NUMBER REPRESENTATIONS
Normal Form
- There are many different floating point number
representations of the same number
--> Need for a unified representation in a given
computer
- the most significant position of the mantissa
contains a non-zero digit

Representation of Zero
- Zero
Mantissa = 0

- Real Zero
Mantissa = 0
Exponent
= smallest representable number
which is represented as
00 . 0
<-- Easily identified by the hardware

Computer Organization
Computer Architectures Lab
Internal and
Data Representation
External Representation
INTERNAL REPRESENTATION AND
EXTERNAL REPRESENTATION
Computer
External
Representation
External
Representation
Internal
Representation
External
Representation
External Representations Internal Representations
- Presentability - Efficiency
- Efficiency Memory space
Communication Processing time
Reliability - Easy to convert to
- Easy to handle external representation
- BCD, ASCII, EBCDIC - Fixed and Floating points

Computer Organization
Computer Architectures Lab
Data Representation
External Representations
EXTERNAL REPRESENTATION
Numbers
Most of numbers stored in the computer are
eventually changed by some kinds of calculations
--> Internal Representation for calculation
efficiency
--> Final results need to be converted to as
External Representation for presentability

Alphabets, Symbols, and some Numbers
Elements of these information do not change
in the course of processing
--> No needs for Internal Representation since
they are not used for calculations
--> External Representation for processing and
presentability

Example
Decimal Number: 4-bit Binary Code
BCD(Binary Coded Deciaml)

greater than 1001 are not used
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

Computer Organization
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Data Representation
External Representations
OTHER DECIMAL CODES
Decimal BCD(8421) 2421 84-2-1 Exess-3
0 0000 0000 0000 0011
1 0001 0001 0111 0100
2 0010 0010 0110 0101
3 0011 0011 0101 0110
4 0100 0100 0100 0111
5 0101 1011 1011 1000
6 0110 1100 1010 1001
7 0111 1101 1001 1010
8 1000 1110 1000 1011
9 1001 1111 1111 1100

Note: 8,4,2,-2,1,-1 in this table is the weight
associated with each bit position.

d3 d2 d1 d0: symbol in the codes
BCD: d3 x 8 + d2 x 4 + d1 x 2 + d0 x 1
==> 8421 code.
2421: d3 x 2 + d2 x 4 + d1 x 2 + d0 x 1
84-2-1: d3 x 8 + d2 x 4 + d1 x (-2) + d0 x (-1)
Execess-3: BCD + 3

BCD: It is difficult to obtain the 9’s complement.
However, it is easily obtained with the other codes
listed above.

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Data Representation
Other Binary codes
GRAY CODE
* Characterized by having their representations of
the binary integers differ in only one digit
between consecutive integers

* Useful in analog-digital conversion.
The complete 4-bit Gray code
Decimal Gray Binary
number

g g g g b b b b
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 1 0 0 1 0
3 0 0 1 0 0 0 1 1
4 0 1 1 0 0 1 0 0
5 0 1 1 1 0 1 0 1
6 0 1 0 1 0 1 1 0
7 0 1 0 0 0 1 1 1
8 1 1 0 0 1 0 0 0
9 1 1 0 1 1 0 0 1
10 1 1 1 1 1 0 1 0
11 1 1 1 0 1 0 1 1
12 1 0 1 0 1 1 0 0
13 1 0 1 1 1 1 0 1
14 1 0 0 1 1 1 1 0
15 1 0 0 0 1 1 1 1

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Data Representation
Other Binary codes
GRAY CODE - ANALYSIS
Letting g g . . . g g be the (n+1)-bit Gray code
for the binary number b b
g = b b , 0 i n-1
b = g g . . . g
Reflection of Gray codes
0 0 0 0 00 0 000
1 0 1 0 01 0 001
1 1 0 11 0 011
1 0 0 10 0 010
1 10 0 110

1 11 0 111
1 01 0 101

The Gray code has a reflection property
- easy to construct a table without
calculation,
- for any n: reflect ca
se n-1 about a 1 111
mirror at its bottom and prefix 0 and 1
to top and bottom halv
ectively 1 001
1 101
1 000

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Data Representation
Other Binary codes
CHARACTER REPRESENTATION
ASCII(American Standard Code for Information Interchange) Code
MSB (3 bits)
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Data Representation
Other Binary codes
CONTROL CHARACTER
REPRESENTAION
NUL Null
SOH Start of Heading (CC)
STX Start of Text (CC)
ETX End of Text (CC)
EOT End of Transmission (CC)
ENQ Enquiry (CC)
ACK Acknowledge (CC)
BEL Bell
BS Backspace (FE)
HT Horizontal Tab. (FE)
LF Line Feed (FE)
VT Vertical Tab. (FE)
FF Form Feed (FE)
CR Carriage Return (FE)
SO Shift Out
SI Shift In
DLE Data Link Escape (CC)
DC1 Device Control 1
DC2 Device Control 2
DC3 Device Control 3
DC4 Device Control 4
NAK Negative Acknowledge (CC)
SYN Synchronous Idle (CC)
ETB End of Transmission Block (CC)
CAN Cancel
EM End of Medium
SUB Substitute
ESC Escape
FS File Separator (IS)

(CC) Communication
GS Group Separator (IS)
RS Record Separator (IS)
(FE) Format Effector
US Unit Separator (IS)
(IS) Information
DEL Delete
Separator
Computer Organization
Computer Architectures Lab
Data Representation
Error Detecting codes
ERROR DETECTING CODES
Parity System
- Simplest method for error detection
- One parity bit attached to the information
- Even Parity and Odd Parity

Even Parity
- One bit is attached to the information so that
the total number of 1 bits is an even number

1011001 0
1010010 1

Odd Parity
- One bit is attached to the information so that
the total number of 1 bits is an odd number

1011001 1
1010010 0

Parity Bit Generation
For b b . b (7-bit information); even parity bit b

= b b . b
For even parity bit
Computer Organization
Computer Architectures Lab
Data Representation
Error Detecting codes
PARITY GENERATOR AND
PARITY CHECKER
Parity Generator Circuit(even parity)
Parity Checker
indicator
Computer Organization
Computer Architectures Lab

Source: http://cs.sch.ac.kr/5a202/chap3.pdf

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